This invention relates to monolithic integrated semiconductor structures, in particular to an integrated device comprising a bipolar transistor and a MOSFET transistor, both of the vertical conduction type and connected together into an emitter switching configuration.
As is known, an emitter switching configuration is composed of a vertical bipolar transistor, usually a high-voltage power transistor, and an electronic switch in series with the emitter of the bipolar transistor. Typically, the electronic switch is a low-voltage MOSFET power transistor with its drain terminal connected to the emitter terminal of the bipolar transistor. The electronic switch "break" quickly cuts off the bipolar transistor. Such an advantage is useful in those applications where the bipolar transistor is to be to switched between its conductive and non-conductive states at a fast rate.
An integrated structure of a device including a bipolar power transistor and a MOSFET transistor in the above-described configuration is disclosed in European Patent Application EP 88202899.6 filed on 16 Dec. 1988 by SGS-THOMSON MICROELECTRONICS. Briefly, that structure, also shown in FIG. 1 of the drawings that accompany this specification, is formed on a substrate 10 of a semiconductor material, e.g., a chip of monocrystalline silicon, of the N+ type, that is having a high concentration of impurities of the N type. (Notice that, in the drawing, the concentrations of impurities of the N type and the P type are identified as customary by the addition of a sign "-" or "+" to the characters N and P; the characters N and P alone denote concentrations of intermediate value.)
Formed on the front surface of substrate 10 are two epitaxial layers 11 and 12 of the N- and N types, respectively. The layer 11 and the substrate 10, together contain the collector region of the bipolar transistor. A metallic layer 28, applied on the back surface of substrate 10, forms the collector terminal C.
A P- region 13, formed between the epitaxial layers 11 and 12 and commonly referred to as a buried region, forms the base region of the transistor. A P+ isolation and deep base contact region 15 extends from the front surface of the chip to the edge of the base region 13, and encloses an isolated N region 16. An N+ buried region 14 forms a junction with P- region 13 and constitutes the emitter region of the bipolar transistor.
A P region 25 extends within the isolated region 16, which constitutes the body region of the MOSFET transistor and contains the transistor channel. Formed within P region 25 is a region 26 constituting the source region of the MOSFET transistor. A strip 22 of an electrically conductive material, which overlies the channel and is insulated from the chip surface, constitutes the gate electrode, which is terminal G of the device.
Electrically conductive surface contact strips 4 and 5 are formed on the source region 26 and the isolation region 15, respectively, to provide the source terminal S of the MOSFET transistor and the base terminal B of the bipolar transistor, respectively. The drain region of the MOSFET transistor is provided by the portion of the N layer 12 that is included between the buffed emitter region 14 and the body region 25 and is unconnected to external electrodes.
The above-described structure can be implemented in an extremely compact form by virtue of the overlapped arrangement of the two transistors. However, it has been found that this beneficial feature cannot be fully exploited because the device performance rapidly deteriorates to become unacceptable as the distance of the body region 25 of the MOSFET transistor to the isolation and deep base contact region 15 drops below a certain limit value. Specifically, it has been observed that in such cases the bipolar transistor gain decreases drastically as the collector current increases.
In addition, the above-described device requires separate driver circuits for the two transistors because, as is well recognized, the bipolar transistor is current driven, whereas the MOSFET transistor is voltage driven. Thus, separate drivers are used even in those applications where the control signals to the two transistors are simultaneous and of the same sign, such as in a switching power supply. In such cases, the need for separate drivers further reduces the benefits to be derived from the compact design of the structure.